In a multi-core processor, cores are put into sleep states to save power and waking-up the cores from the sleep state may require regulatory process, which may cause latency. If a stream of interrupts targeting different sleeping cores is in process one at a time, then the last interrupt in the line absorbs the cumulative latency of all the interrupts ahead of the last interrupt. In a multi-core processor, the cumulative latency may be in the order of milliseconds, which may cause irregular spikes, spurious transactions, and timeouts.